7/10/2023 0 Comments Fedora cpuinfo**- Physical Processor 4 (Hyperthreaded) **- Physical Processor 3 (Hyperthreaded) **- Physical Processor 2 (Hyperthreaded) **- Physical Processor 1 (Hyperthreaded) ![]() Maximum implemented address width: 48 bits (virtual), 39 bits (physical). PREFETCHW * Supports PREFETCHW instruction PSN - Implements 96-bit processor serial number ![]() MCA * Implements Machine Check Architecture MCE * Supports Machine Check, INT18 and CR4.MCE TM2 * Implements Thermal Monitor 2 controlĪPIC * Implements software-accessible local APICĬNXT-ID - L1 data cache mode adaptive or BIOS TM * Implements thermal monitor circuitry XTPR * Supports disabling task priority messagesĪCPI * Implements MSR for power management TSC-INVARIANT * TSC runs at constant rate TSC-DEADLINE - Local APIC supports one-shot deadline timer PDCM * Supports Performance Capabilities MSR PCID * Supports PCIDs and settable CR4.PCIDE RTM * Supports Restricted Transactional Memory instructionsĭE * Supports I/O breakpoints including CR4.DEĭTES64 * Can write history of 64-bit branch addressesĭS * Implements memory-resident debug bufferĭS-CPL - Supports Debug Store feature with CPL HLE * Supports Hardware Lock Elision instructions LAHF-SAHF * Supports LAHF/SAHF instructions in 64-bit mode SEP * Supports fast system call instructions MONITOR - Supports MONITOR and MWAIT instructionsĮRMSB * Supports Enhanced REP MOVSB/STOSB OSXSAVE * Supports XSETBV/XGETBV instructionsĬX8 * Supports compare and exchange 8-byte instructionsīMI1 * Supports bit manipulation extensions 1īMI2 * Supports bit manipulation extensions 2ĭCA - Supports prefetch from memory-mapped deviceį16C * Supports half-precision instructionįXSR * Supports FXSAVE/FXSTOR instructionsįFXSR - Supports optimized FXSAVE/FSRSTOR instruction XSAVE * Supports XSAVE/XRSTOR instructions MTRR * Supports Memory Type Range Registers MSR * Implements RDMSR/WRMSR instructions SSE4.2 * Supports Streaming SIMD Extensions 4.2ĪVX * Supports AVX instruction extensionsĪVX2 * Supports AVX2 instruction extensionsĪVX-512-F - Supports AVX-512 Foundation instructionsĪVX-512-DQ - Supports AVX-512 double and quadword instructionsĪVX-512-IFAMA - Supports AVX-512 integer Fused multiply-add instructionsĪVX-512-PF - Supports AVX-512 prefetch instructionsĪVX-512-ER - Supports AVX-512 exponential and reciprocal instructionsĪVX-512-CD - Supports AVX-512 conflict detection instructionsĪVX-512-BW - Supports AVX-512 byte and word instructionsĪVX-512-VL - Supports AVX-512 vector length instructionsįMA * Supports FMA extensions using YMM state SSE4.1 * Supports Streaming SIMD Extensions 4.1 SSE4a - Supports Streaming SIMDR Extensions 4a SSSE3 * Supports Supplemental SIMD Extensions 3 SSE3 * Supports Streaming SIMD Extensions 3 SSE2 * Supports Streaming SIMD Extensions 2 RDWRFSGSBASE * Supports direct GS/FS base accessįPU * Implements i387 floating point instructionsģDNOWEXT - Supports 3DNow! extension instructions SS * Supports bus snooping for cache operations PSE36 * Supports > 32-bit address 4 MB pages PAE * Supports > 32-bit physical addresses SMAP * Supports Supervisor Mode Access Prevention SMEP * Supports Supervisor Mode Execution Prevention ![]() SVM - Supports AMD hardware-assisted virtualization VMX - Supports Intel hardware-assisted virtualization ![]() Querying CET support requires admin rights Intel64 Family 6 Model 158 Stepping 10, GenuineIntelĪdministrator rights are required to query information. Procinfo on fedora Capture.PNG (86.25 KiB) Viewed 2939 timesĬoreinfo v3.52 - Dump information on system CPU and memory topology
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